POK
rtl8029.h
1 /*
2  * POK header
3  *
4  * The following file is a part of the POK project. Any modification should
5  * made according to the POK licence. You CANNOT use this file or a part of
6  * this file is this part of a file for your own project
7  *
8  * For more information on the POK licence, please see our LICENCE FILE
9  *
10  * Please follow the coding guidelines described in doc/CODING_GUIDELINES
11  *
12  * Copyright (c) 2007-2009 POK team
13  *
14  * Created by julien on Mon May 18 18:44:51 2009
15  */
16 
17 #ifdef POK_NEEDS_RTL8029
18 # ifndef __POK_RTL8029_H__
19 # define __POK_RTL8029_H__
20 
21 # include <libc/stdio.h>
22 # include <libc/string.h>
23 # include <arch/x86/pci.h>
24 # include <arch/x86/ioports.h>
25 # include <middleware/port.h>
26 
27 # define ETH_DATA_MAXLEN 1500
28 # define ETH_DATA_MINLEN 46
29 # define ETH_MAC_LEN 6
30 
31 # define RECV_BUF_SZ 20
32 
33 // Ethernet header
34 typedef struct
35 {
36  char dst[ETH_MAC_LEN];
37  char src[ETH_MAC_LEN];
38  unsigned short ethertype;
39 } __attribute__ ((__packed__)) eth_hdr_t;
40 
41 typedef struct
42 {
43  unsigned short src;
44  unsigned short dst;
45  unsigned short len;
46  unsigned short chk; // not used
47 } __attribute__ ((__packed__)) udp_hdr_t;
48 
49 # define NET_DATA_MAXLEN (ETH_DATA_MAXLEN - sizeof (udp_hdr_t))
50 # define NET_DATA_MINLEN (ETH_DATA_MINLEN - sizeof (udp_hdr_t))
51 
52 typedef struct
53 {
54  eth_hdr_t eth;
55  udp_hdr_t udp;
56  char data[NET_DATA_MAXLEN];
57 } __attribute__ ((__packed__)) pok_packet_t;
58 
59 typedef struct
60 {
61  uint32_t len;
62  uint32_t off;
63  char data[RECV_BUF_SZ];
64 } __attribute__ ((__packed__)) pok_queue_t;
65 
66 typedef struct
67 {
68  s_pci_device pci;
69  unsigned int addr;
70  char mac[6];
71  pok_queue_t recv_buf[20]; /* TODO: random constant */
72 } s_ne2000_dev;
73 
74 typedef struct
75 {
76  unsigned char status;
77  unsigned char next;
78  unsigned short size;
79 } __attribute__ ((packed)) s_ne2000_header;
80 
81 /* CR: Command Register */
82 # define NE2000_CR 0x00 /* Register address */
83 # define NE2000_CR_STP (1 << 0) /* This bit is the STOP command. When it is
84  set, no packets will be received or
85  transmitted. POWER UP=1. */
86 # define NE2000_CR_STA (1 << 1) /* The STA bit controls nothing. It only
87  reflects the value written to this bit.
88  POWER UP=0. */
89 # define NE2000_CR_TXP (1 << 2) /* This bit must be set to transmit a packet.
90  It is internally reset either after the
91  transmission is completed or aborted. */
92 # define NE2000_CR_RD0 (1 << 3) /* See RD2-0 in the datasheet */
93 # define NE2000_CR_RD1 (1 << 4) /* See RD2-0 in the datasheet */
94 # define NE2000_CR_RD2 (1 << 5) /* See RD2-0 in the datasheet */
95 # define NE2000_CR_PS0 (1 << 6) /* See PS0 in the datasheet */
96 # define NE2000_CR_PS1 (1 << 7) /* See PS1 in the datasheet */
97 
98 /* ISR: Interrupt Status Register */
99 # define NE2000_ISR 0x07 /* Register address */
100 
101 # define NE2000_ISR_PRX (1 << 0) /* This bit indicates packet received with no
102  errors. */
103 # define NE2000_ISR_PTX (1 << 1) /* This bit indicates packet transmitted with
104  no errors. */
105 # define NE2000_ISR_RXE (1 << 2) /* This bit is set when a packet received
106  with one or more of the following errors:
107  - CRC error
108  - Frame alignment error
109  - Missed packet */
110 # define NE2000_ISR_TXE (1 << 3) /* Transmit error bit is set when a packet
111  transmission is aborted due to excessive
112  collisions. */
113 # define NE2000_ISR_OVW (1 << 4) /* This bit is set when the receive buffer
114  has been exhausted. */
115 # define NE2000_ISR_CNT (1 << 5) /* Set when MSB of one or more of the network
116  tally counters has been set. */
117 # define NE2000_ISR_RDC (1 << 6) /* Set when remote DMA operation has been
118  completed. */
119 # define NE2000_ISR_RST (1 << 7) /* This bit is set when NIC enters reset state
120  and is cleared when a start command is
121  issued to the CR. It is also set when
122  receive buffer overflows and is cleared
123  when one or more packets have been read from
124  the buffer. */
125 
126 /* DCR: Data Configuration Register */
127 # define NE2000_DCR 0x0E /* Register address */
128 # define NE2000_DCR_WTS (1 << 0) /* Word Transfer Select
129  0: byte-wide DMA transfer
130  1: word-wide DMA transfer */
131 # define NE2000_DCR_BOS (1 << 1) /* Byte Order Select
132  0: MS byte placed on MD15-8 and LS byte on MD7-0. (32xxx,80x86)
133  1: MS byte placed on MD7-0 and LS byte on MD15-8. (680x0) */
134 # define NE2000_DCR_LAS (1 << 2) /* This bit must be set to zero. NIC only supports dual 16-bit DMA
135  mode. POWER UP =1 */
136 # define NE2000_DCR_LS (1 << 3) /* Loopback Select
137  0: Loopback mode selected. Bits 1 and 2 of the TCR must also be
138  programmed for Loopback operation.
139  1: Normal Operation */
140 # define NE2000_DCR_ARM (1 << 4) /* Auto-initialize Remote
141  0: Send Packet Command not executed.
142  1: Send Packet Command executed.
143  This bit is set when the receive buffer */
144 # define NE2000_DCR_FT0 (1 << 5) /* FIFO threshold select bit 0. */
145 # define NE2000_DCR_FT1 (1 << 6) /* FIFO threshold select bit 1. */
146 
147 /* RCR: Receive Configuration Register */
148 # define NE2000_RCR 0x0C /* Register address */
149 # define NE2000_RCR_AB (1 << 2) /* If AB=1, packets with broadcast destination
150  address are accepted.
151  If AB=0, packets with broadcast destination
152  address are rejected.*/
153 
154 /* RSR: Receive Status Register */
155 # define NE2000_RSR 0x0C /* Register address */
156 # define NE2000_RSR_PRX (1 << 0) /* This bit indicates packet received with
157  no errors.*/
158 
159 /* IMR: Interrupt Mask Register */
160 # define NE2000_IMR 0x0F /* Register address */
161 
162 /* PSTART: Page Start Register */
163 # define NE2000_PSTART 0x01 /* Register address */
164 
165 /* PSTOP: Page Stop Register */
166 # define NE2000_PSTOP 0x02 /* Register address */
167 
168 /* BNRY: Boundary Register */
169 # define NE2000_BNRY 0x03 /* Register address */
170 
171 /* TPSR: Transmit Page Start Register */
172 # define NE2000_TPSR 0x04 /* Register address */
173 
174 /* TCR: Transmit Configuration Register */
175 # define NE2000_TCR 0x0D /* Register address */
176 
177 /* CURR: Current Page Register */
178 # define NE2000_CURR 0x07 /* Register address */
179 
180 /* TBCR0,1: Transmit Byte Count Registers */
181 # define NE2000_TBCR0 0x05 /* Register address */
182 # define NE2000_TBCR1 0x06 /* Register address */
183 
184 
185 /* RSAR0,1: Remote Start Address Registers */
186 # define NE2000_RSAR0 0x08 /* Register address */
187 # define NE2000_RSAR1 0x09 /* Register address */
188 
189 /* RBCR0,1: Remote Byte Count Registers */
190 # define NE2000_RBCR0 0x0A /* Register address */
191 # define NE2000_RBCR1 0x0B /* Register address */
192 
193 /* PAR0-5: Physical Address Registers */
194 # define NE2000_PAR0 0x01 /* Register address */
195 # define NE2000_PAR1 0x02 /* Register address */
196 # define NE2000_PAR2 0x03 /* Register address */
197 # define NE2000_PAR3 0x04 /* Register address */
198 # define NE2000_PAR4 0x05 /* Register address */
199 # define NE2000_PAR5 0x06 /* Register address */
200 
201 
202 /* MAR0-7: Multicast Address Register */
203 # define NE2000_MAR 0x08 /* Register address */
204 
205 /* Remote DMA Port */
206 # define NE2000_DMA_PORT 0x10 /* Register address */
207 
208 
209 # define NE2000_MEMSZ 128 // device memory size in 256 bytes block
210 # define NE2000_TXBUF 64 // tx buffer offset in 256 bytes block
211 # define NE2000_TXBUFSZ 8 // tx buffer size in 256 bytes block
212 # define NE2000_RXBUF (NE2000_TXBUF + NE2000_TXBUFSZ) // rx buf offset
213  // in 256 bytes block
214 # define NE2000_RXBUFSZ (NE2000_MEMSZ - NE2000_TXBUFSZ) // rx buf size
215  // in 256 bytes block
216 # define outb(a,b) pok_outb((b), (a))
217 
218 # endif /* !__POK_RTL8029_H__ */
219 #endif /* POK_NEEDS_RTL8029 */