xine-lib
1.2.9
xine-lib-1.2.9
src
xine-utils
xine_mmx.h
Go to the documentation of this file.
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/*
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* Copyright (C) 2000-2017 the xine project
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*
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* This file is part of xine, a free video player.
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*
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* xine is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* xine is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*/
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#ifndef XINE_MMX_H
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#define XINE_MMX_H
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#if defined(ARCH_X86)
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#include <
xine/attributes.h
>
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#if !defined(ATTRIBUTE_ALIGNED_MAX)
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# warning ATTRIBUTE_ALIGNED_MAX undefined. Alignment of data structures does not work !
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#elif ATTRIBUTE_ALIGNED_MAX < 16
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# warning Compiler does not support proper alignment for SSE2 !
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#endif
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typedef
union
{
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int64_t q;
/* Quadword (64-bit) value */
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uint64_t uq;
/* Unsigned Quadword */
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int
d[2];
/* 2 Doubleword (32-bit) values */
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unsigned
int
ud[2];
/* 2 Unsigned Doubleword */
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short
w[4];
/* 4 Word (16-bit) values */
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unsigned
short
uw[4];
/* 4 Unsigned Word */
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char
b[8];
/* 8 Byte (8-bit) values */
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unsigned
char
ub[8];
/* 8 Unsigned Byte */
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float
s[2];
/* Single-precision (32-bit) value */
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}
ATTR_ALIGN
(8)
mmx_t
;
/* On an 8-byte (64-bit) boundary */
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#define mmx_i2r(op,imm,reg) \
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__asm__ __volatile__ (#op " %0, %%" #reg \
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:
/* nothing */
\
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: "i" (imm) )
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#define mmx_m2r(op,mem,reg) \
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__asm__ __volatile__ (#op " %0, %%" #reg \
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:
/* nothing */
\
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: "m" (mem))
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/* load dword from memory or gp register */
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#define mmx_a2r(op,any,reg) \
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__asm__ __volatile__ (#op " %0, %%" #reg \
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:
/* nothing */
\
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: "g" (any))
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#define mmx_r2m(op,reg,mem) \
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__asm__ __volatile__ (#op " %%" #reg ", %0" \
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: "=m" (mem) \
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:
/* nothing */
)
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#define mmx_r2a(op,reg,any) \
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__asm__ __volatile__ (#op " %%" #reg ", %0" \
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: "=g" (any) \
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:
/* nothing */
)
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#define mmx_r2r(op,regs,regd) \
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__asm__ __volatile__ (#op " %" #regs ", %" #regd)
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#define emms() __asm__ __volatile__ ("emms")
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#define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
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#define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
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#define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd)
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#define movd_a2r(any,reg) mmx_a2r (movd, any, reg)
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#define movd_r2a(reg,any) mmx_r2a (movd, reg, any)
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#define movq_m2r(var,reg) mmx_m2r (movq, var, reg)
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#define movq_r2m(reg,var) mmx_r2m (movq, reg, var)
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#define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd)
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#define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg)
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#define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
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#define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg)
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#define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
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#define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg)
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#define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
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#define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg)
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#define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd)
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#define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg)
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#define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd)
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#define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg)
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#define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd)
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#define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg)
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#define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd)
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#define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg)
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#define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd)
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#define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg)
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#define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd)
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#define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg)
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#define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd)
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#define pand_m2r(var,reg) mmx_m2r (pand, var, reg)
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#define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd)
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#define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg)
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#define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd)
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#define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg)
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#define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd)
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#define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg)
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#define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd)
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#define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg)
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#define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd)
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#define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg)
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#define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd)
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#define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg)
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#define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd)
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#define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg)
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#define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd)
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#define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg)
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#define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd)
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#define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg)
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#define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd)
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#define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg)
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#define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd)
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#define por_m2r(var,reg) mmx_m2r (por, var, reg)
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#define por_r2r(regs,regd) mmx_r2r (por, regs, regd)
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#define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg)
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#define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg)
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#define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd)
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#define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg)
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#define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg)
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#define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd)
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#define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg)
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#define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg)
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#define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd)
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#define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg)
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#define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg)
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#define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd)
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#define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg)
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#define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg)
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#define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd)
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#define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg)
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#define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg)
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#define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd)
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#define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg)
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#define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg)
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#define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd)
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#define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg)
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#define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg)
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#define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd)
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#define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg)
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#define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd)
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#define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg)
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#define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd)
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#define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg)
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#define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd)
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#define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg)
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#define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd)
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#define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg)
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#define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd)
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#define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg)
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#define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd)
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#define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg)
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#define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd)
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#define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg)
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#define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd)
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#define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg)
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#define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd)
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#define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg)
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#define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd)
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#define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg)
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#define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd)
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#define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg)
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#define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd)
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#define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg)
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#define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd)
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#define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg)
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#define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd)
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/* 3DNOW extensions */
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#define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg)
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#define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd)
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/* AMD MMX extensions - also available in intel SSE */
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#define mmx_m2ri(op,mem,reg,imm) \
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__asm__ __volatile__ (#op " %1, %0, %%" #reg \
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:
/* nothing */
\
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: "X" (mem), "X" (imm))
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#define mmx_r2ri(op,regs,regd,imm) \
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__asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
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:
/* nothing */
\
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: "X" (imm) )
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#define mmx_fetch(mem,hint) \
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__asm__ __volatile__ ("prefetch" #hint " %0" \
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:
/* nothing */
\
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: "X" (mem))
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#define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg)
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#define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var)
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#define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg)
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#define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd)
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#define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg)
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#define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd)
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#define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm)
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#define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm)
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#define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg)
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#define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd)
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#define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg)
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#define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd)
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#define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg)
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#define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd)
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#define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg)
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#define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
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#define pmovmskb(mmreg,reg) \
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__asm__ __volatile__ ("pmovmskb %" #mmreg ", %" #reg)
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#define pmovmskb_r2a(mmreg,regvar) \
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__asm__ __volatile__ ("pmovmskb %%" #mmreg ", %0" : "=r" (regvar))
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#define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
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#define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
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#define prefetcht0(mem) mmx_fetch (mem, t0)
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#define prefetcht1(mem) mmx_fetch (mem, t1)
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#define prefetcht2(mem) mmx_fetch (mem, t2)
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#define prefetchnta(mem) mmx_fetch (mem, nta)
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#define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg)
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#define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd)
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#define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm)
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#define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm)
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#define sfence() __asm__ __volatile__ ("sfence\n\t")
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typedef
union
{
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int64_t q[2];
/* Quadword (64-bit) value */
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uint64_t uq[2];
/* Unsigned Quadword */
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int32_t d[4];
/* Doubleword (32-bit) values */
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uint32_t ud[4];
/* Unsigned Doubleword */
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short
w[8];
/* Word (16-bit) values */
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unsigned
short
uw[8];
/* Unsigned Word */
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char
b[16];
/* Byte (8-bit) values */
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unsigned
char
ub[16];
/* Unsigned Byte */
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float
sf[4];
/* Single-precision (32-bit) value */
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}
ATTR_ALIGN
(16) sse_t;
/* On a 16 byte (128-bit) boundary */
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#define FILL_SSE_UW(w) {uw:{w,w,w,w,w,w,w,w}}
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#define sse_i2r(op, imm, reg) \
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__asm__ __volatile__ (#op " %0, %%" #reg \
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:
/* nothing */
\
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: "X" (imm) )
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#define sse_m2r(op, mem, reg) \
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__asm__ __volatile__ (#op " %0, %%" #reg \
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:
/* nothing */
\
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: "X" (mem))
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#define sse_r2m(op, reg, mem) \
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__asm__ __volatile__ (#op " %%" #reg ", %0" \
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: "=X" (mem) \
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:
/* nothing */
)
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#define sse_r2r(op, regs, regd) \
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__asm__ __volatile__ (#op " %" #regs ", %" #regd)
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#define sse_r2ri(op, regs, regd, imm) \
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__asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
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:
/* nothing */
\
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: "X" (imm) )
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#define sse_m2ri(op, mem, reg, subop) \
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__asm__ __volatile__ (#op " %0, %%" #reg ", " #subop \
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:
/* nothing */
\
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: "X" (mem))
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#define movaps_m2r(var, reg) sse_m2r(movaps, var, reg)
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#define movaps_r2m(reg, var) sse_r2m(movaps, reg, var)
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#define movaps_r2r(regs, regd) sse_r2r(movaps, regs, regd)
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#define movntps_r2m(xmmreg, var) sse_r2m(movntps, xmmreg, var)
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#define movups_m2r(var, reg) sse_m2r(movups, var, reg)
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#define movups_r2m(reg, var) sse_r2m(movups, reg, var)
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#define movups_r2r(regs, regd) sse_r2r(movups, regs, regd)
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#define movhlps_r2r(regs, regd) sse_r2r(movhlps, regs, regd)
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#define movlhps_r2r(regs, regd) sse_r2r(movlhps, regs, regd)
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#define movhps_m2r(var, reg) sse_m2r(movhps, var, reg)
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#define movhps_r2m(reg, var) sse_r2m(movhps, reg, var)
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#define movlps_m2r(var, reg) sse_m2r(movlps, var, reg)
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#define movlps_r2m(reg, var) sse_r2m(movlps, reg, var)
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#define movss_m2r(var, reg) sse_m2r(movss, var, reg)
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#define movss_r2m(reg, var) sse_r2m(movss, reg, var)
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#define movss_r2r(regs, regd) sse_r2r(movss, regs, regd)
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#define shufps_m2r(var, reg, index) sse_m2ri(shufps, var, reg, index)
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#define shufps_r2r(regs, regd, index) sse_r2ri(shufps, regs, regd, index)
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#define cvtpi2ps_m2r(var, xmmreg) sse_m2r(cvtpi2ps, var, xmmreg)
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#define cvtpi2ps_r2r(mmreg, xmmreg) sse_r2r(cvtpi2ps, mmreg, xmmreg)
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#define cvtps2pi_m2r(var, mmreg) sse_m2r(cvtps2pi, var, mmreg)
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#define cvtps2pi_r2r(xmmreg, mmreg) sse_r2r(cvtps2pi, mmreg, xmmreg)
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#define cvttps2pi_m2r(var, mmreg) sse_m2r(cvttps2pi, var, mmreg)
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#define cvttps2pi_r2r(xmmreg, mmreg) sse_r2r(cvttps2pi, mmreg, xmmreg)
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#define cvtsi2ss_m2r(var, xmmreg) sse_m2r(cvtsi2ss, var, xmmreg)
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#define cvtsi2ss_r2r(reg, xmmreg) sse_r2r(cvtsi2ss, reg, xmmreg)
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#define cvtss2si_m2r(var, reg) sse_m2r(cvtss2si, var, reg)
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#define cvtss2si_r2r(xmmreg, reg) sse_r2r(cvtss2si, xmmreg, reg)
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#define cvttss2si_m2r(var, reg) sse_m2r(cvtss2si, var, reg)
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#define cvttss2si_r2r(xmmreg, reg) sse_r2r(cvtss2si, xmmreg, reg)
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#define movmskps(xmmreg, reg) \
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__asm__ __volatile__ ("movmskps %" #xmmreg ", %" #reg)
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#define addps_m2r(var, reg) sse_m2r(addps, var, reg)
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#define addps_r2r(regs, regd) sse_r2r(addps, regs, regd)
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#define addss_m2r(var, reg) sse_m2r(addss, var, reg)
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#define addss_r2r(regs, regd) sse_r2r(addss, regs, regd)
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#define subps_m2r(var, reg) sse_m2r(subps, var, reg)
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#define subps_r2r(regs, regd) sse_r2r(subps, regs, regd)
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#define subss_m2r(var, reg) sse_m2r(subss, var, reg)
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#define subss_r2r(regs, regd) sse_r2r(subss, regs, regd)
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#define mulps_m2r(var, reg) sse_m2r(mulps, var, reg)
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#define mulps_r2r(regs, regd) sse_r2r(mulps, regs, regd)
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#define mulss_m2r(var, reg) sse_m2r(mulss, var, reg)
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#define mulss_r2r(regs, regd) sse_r2r(mulss, regs, regd)
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#define divps_m2r(var, reg) sse_m2r(divps, var, reg)
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#define divps_r2r(regs, regd) sse_r2r(divps, regs, regd)
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#define divss_m2r(var, reg) sse_m2r(divss, var, reg)
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#define divss_r2r(regs, regd) sse_r2r(divss, regs, regd)
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#define rcpps_m2r(var, reg) sse_m2r(rcpps, var, reg)
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#define rcpps_r2r(regs, regd) sse_r2r(rcpps, regs, regd)
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#define rcpss_m2r(var, reg) sse_m2r(rcpss, var, reg)
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#define rcpss_r2r(regs, regd) sse_r2r(rcpss, regs, regd)
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#define rsqrtps_m2r(var, reg) sse_m2r(rsqrtps, var, reg)
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#define rsqrtps_r2r(regs, regd) sse_r2r(rsqrtps, regs, regd)
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#define rsqrtss_m2r(var, reg) sse_m2r(rsqrtss, var, reg)
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#define rsqrtss_r2r(regs, regd) sse_r2r(rsqrtss, regs, regd)
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#define sqrtps_m2r(var, reg) sse_m2r(sqrtps, var, reg)
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#define sqrtps_r2r(regs, regd) sse_r2r(sqrtps, regs, regd)
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#define sqrtss_m2r(var, reg) sse_m2r(sqrtss, var, reg)
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#define sqrtss_r2r(regs, regd) sse_r2r(sqrtss, regs, regd)
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#define andps_m2r(var, reg) sse_m2r(andps, var, reg)
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#define andps_r2r(regs, regd) sse_r2r(andps, regs, regd)
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#define andnps_m2r(var, reg) sse_m2r(andnps, var, reg)
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#define andnps_r2r(regs, regd) sse_r2r(andnps, regs, regd)
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#define orps_m2r(var, reg) sse_m2r(orps, var, reg)
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#define orps_r2r(regs, regd) sse_r2r(orps, regs, regd)
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#define xorps_m2r(var, reg) sse_m2r(xorps, var, reg)
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#define xorps_r2r(regs, regd) sse_r2r(xorps, regs, regd)
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#define maxps_m2r(var, reg) sse_m2r(maxps, var, reg)
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#define maxps_r2r(regs, regd) sse_r2r(maxps, regs, regd)
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#define maxss_m2r(var, reg) sse_m2r(maxss, var, reg)
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#define maxss_r2r(regs, regd) sse_r2r(maxss, regs, regd)
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#define minps_m2r(var, reg) sse_m2r(minps, var, reg)
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#define minps_r2r(regs, regd) sse_r2r(minps, regs, regd)
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#define minss_m2r(var, reg) sse_m2r(minss, var, reg)
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#define minss_r2r(regs, regd) sse_r2r(minss, regs, regd)
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#define cmpps_m2r(var, reg, op) sse_m2ri(cmpps, var, reg, op)
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#define cmpps_r2r(regs, regd, op) sse_r2ri(cmpps, regs, regd, op)
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#define cmpeqps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 0)
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#define cmpeqps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 0)
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#define cmpltps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 1)
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#define cmpltps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 1)
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#define cmpleps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 2)
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#define cmpleps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 2)
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#define cmpunordps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 3)
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#define cmpunordps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 3)
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#define cmpneqps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 4)
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#define cmpneqps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 4)
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#define cmpnltps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 5)
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#define cmpnltps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 5)
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#define cmpnleps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 6)
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#define cmpnleps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 6)
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#define cmpordps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 7)
460
#define cmpordps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 7)
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#define cmpss_m2r(var, reg, op) sse_m2ri(cmpss, var, reg, op)
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#define cmpss_r2r(regs, regd, op) sse_r2ri(cmpss, regs, regd, op)
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#define cmpeqss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 0)
466
#define cmpeqss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 0)
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#define cmpltss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 1)
469
#define cmpltss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 1)
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#define cmpless_m2r(var, reg) sse_m2ri(cmpss, var, reg, 2)
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#define cmpless_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 2)
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#define cmpunordss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 3)
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#define cmpunordss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 3)
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#define cmpneqss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 4)
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#define cmpneqss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 4)
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#define cmpnltss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 5)
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#define cmpnltss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 5)
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#define cmpnless_m2r(var, reg) sse_m2ri(cmpss, var, reg, 6)
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#define cmpnless_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 6)
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#define cmpordss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 7)
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#define cmpordss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 7)
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#define comiss_m2r(var, reg) sse_m2r(comiss, var, reg)
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#define comiss_r2r(regs, regd) sse_r2r(comiss, regs, regd)
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#define ucomiss_m2r(var, reg) sse_m2r(ucomiss, var, reg)
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#define ucomiss_r2r(regs, regd) sse_r2r(ucomiss, regs, regd)
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#define unpcklps_m2r(var, reg) sse_m2r(unpcklps, var, reg)
496
#define unpcklps_r2r(regs, regd) sse_r2r(unpcklps, regs, regd)
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#define unpckhps_m2r(var, reg) sse_m2r(unpckhps, var, reg)
499
#define unpckhps_r2r(regs, regd) sse_r2r(unpckhps, regs, regd)
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#define fxrstor(mem) \
502
__asm__ __volatile__ ("fxrstor %0" \
503
:
/* nothing */
\
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: "X" (mem))
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#define fxsave(mem) \
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__asm__ __volatile__ ("fxsave %0" \
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:
/* nothing */
\
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: "X" (mem))
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#define stmxcsr(mem) \
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__asm__ __volatile__ ("stmxcsr %0" \
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:
/* nothing */
\
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: "X" (mem))
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#define ldmxcsr(mem) \
517
__asm__ __volatile__ ("ldmxcsr %0" \
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:
/* nothing */
\
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: "X" (mem))
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/* SSE2 */
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#define movdqa_m2r(var, reg) mmx_m2r (movdqa, var, reg)
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#define movdqa_r2m(reg, var) mmx_r2m (movdqa, reg, var)
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#define movdqa_r2r(regs, regd) mmx_r2r (movdqa, regs, regd)
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#define movdqu_m2r(var, reg) mmx_m2r (movdqu, var, reg)
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#define movdqu_r2m(reg, var) mmx_r2m (movdqu, reg, var)
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#define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg)
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#define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg)
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#define pshufd_m2r(var, reg, imm) mmx_m2ri (pshufd, var, reg, imm)
535
#define pshufd_r2r(regs, regd, imm) mmx_r2ri (pshufd, regs, regd, imm)
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#define pshuflw_m2r(var, reg, imm) mmx_m2ri (pshuflw, var, reg, imm)
538
#define pshuflw_r2r(regs, regd, imm) mmx_r2ri (pshuflw, regs, regd, imm)
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540
/* SSSE3 */
541
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#define pmaddubsw_r2r(regs, regd) mmx_r2r(pmaddubsw, regs, regd)
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#endif
/*ARCH_X86 */
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#endif
/*XINE_MMX_H*/
mmx_t
Definition:
mmx.h:53
ATTR_ALIGN
#define ATTR_ALIGN(align)
Definition:
attributes.h:64
attributes.h
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